Single–Chip Microcomputer H8/3337, F-ZTAT
• Two-way general register configuration
• Eight 16-bit registers, or Sixteen 8-bit registers
• Maximum clock rate (ø clock): 16 MHz at 5 V, 12MHz at 4 V or 10 MHz at 3 V
• 8- or 16-bit register-register add/subtract: 125 ns (16 MHz), 167 ns (12MHz), 200 ns (10 MHz)
• 8 × 8-bit multiply: 875 ns (16 MHz), 1167 ns (12MHz), 1400 ns (10 MHz)
• 16 ÷ 8-bit divide: 875 ns (16 MHz), 1167 ns (12MHz), 1400 ns (10 MHz)
• Instruction length: 2 or 4 bytes
• Register-register arithmetic and logic operations
• MOV instruction for data transfer between registers and memory
• Multiply instruction (8 bits × 8 bits)
• Divide instruction (16 bits ÷ 8 bits)
• Bit-accumulator instructions
• Register-indirect specification of bit positions
Datenblatt:
HD64F3337YFJ16V.pdf
